Ecient Implementation of Retiming

Retiming is a technique for optimizing sequential circuits. It repositions the registers in a circuit leaving the combinational cells untouched. The objective of retiming is to nd a circuit with the minimum number of registers for a speci ed clock period. More than ten years have elapsed since Leiserson and Saxe rst presented a theoretical formulation to solve this problem for single-clock edge-triggered sequential circuits. Their proposed algorithms have polynomial complexity; however naive implementations of these algorithms exhibit O(n) time complexity and O(n) space complexity when applied to digital circuits with n combinational cells. This renders retiming ine ective for circuits with more than 500 combinational cells. This paper addresses the implementation issues required to exploit the sparsity of circuit graphs to allow min-period retiming and constrained min-area retiming to be applied to circuits with as many as 10,000 combinational cells. We believe this is the rst paper to address these issues and the rst to report retiming results for large circuits.